Eniac Topics

• army ordnance corps
• aberdeen proving ground
• project px
• ballistic research laboratory
• vacuum tubes
• aberdeen proving ground maryland
• square roots
• evolution of the computer
• u s army
• memory upgrade
• short tons
• s moore
• construction contract
• continuous operation
• university of pennsylvania
• digit number
• digital computer
• square root
• mainframes

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Eniac, Eniac

It was a Turing-complete, digital computer capable of being reprogrammed to solve a full range of computing problems. Shurkin, Joel, Engines of the Mind: The Evolution of the Computer from Mainframes to Microprocessors , 1996, ISBN 0-393-31471-5 ENIAC was designed and built to calculate artillery firing tables for the U.S. Army's Ballistic Research Laboratory.

The construction contract was signed on June 5, 1943, and work on the computer was begun in secret by the University of Pennsylvania's Moore School of Electrical Engineering starting the following month under the code name "Project PX". The completed machine was unveiled on February 14, 1946 at the University of Pennsylvania, having cost almost $500,000. It was formally accepted by the U.S. Army Ordnance Corps in July 1946. ENIAC was shut down on November 9, 1946 for a refurbishment and a memory upgrade, and was transferred to Aberdeen Proving Ground, Maryland in 1947. There, on July 29, 1947, it was turned on and would be in continuous operation until 11:45 p.m. on October 2, 1955.

ENIAC contained 17,468 vacuum tubes, 7,200 crystal diodes, 1,500 relays, 70,000 resistors, 10,000 capacitors and around 5 million hand-soldered joints. It weighed 30 short tons (27 t), was roughly 8.5 by 3 by 80 feet (2.6 m 0.9 m 26 m), took up 680 square feet (63 m 2 ), and consumed 150 kW of power.

In one of these cycles, ENIAC could write a number to a register, read a number from a register, or add/subtract two numbers. A multiplication of a 10-digit number by a d -digit number (for d up to 10) took d +4 cycles, so a 10- by 10-digit multiplication took 14 cycles, or 2800 microsecondsa rate of 357 per second. If one of the numbers had fewer than 10 digits, the operation was faster. Division and square roots took 13( d +1) cycles, where d is the number of digits in the result (quotient or square root). So a division or square root took up to 143 cycles, or 28,600 microsecondsa rate of 35 per second. (Wilkes 1956:20 states that a division with a 10 digit quotient required 6 milliseconds.) If the result had fewer than ten digits, it was obtained faster.

After the program was figured out on paper, the process of getting the program "into" the ENIAC by manipulating its switches and cables took additional days. This was followed by a period of verification and debugging, aided by the ability to "single step" the machine.

Richard Clippinger of the BRL. Dick Clippinger consulted with John von Neumann on what instruction set to implement. Clippinger had thought of a 3-address architecture while von Neumann proposed a 1-address architecture because it was simpler to implement. Three digits of one accumulator (6) were used as the program counter, another accumulator (15) was used as the main accumulator, a third accumulator (8) was used as the address pointer for reading data from the function tables, and most of the other accumulators (1-5, 7, 9-14, 17-19) were used for data memory. The programming of the stored program for ENIAC was done by Betty Jennings, Dick Clippinger and Adele Goldstine. It was first demonstrated as a stored-program computer on September 16, 1948, running a program by Adele Goldstine for John von Neumann. This modification reduced the speed of ENIAC by a factor of six and eliminated the ability of parallel computation, but as it also reduced the reprogramming time to hours instead of days, it was considered well worth the loss of performance. Also analysis had shown that due to differences between the electronic speed of computation and the electromechanical speed of input/output, almost any practical real world problem was completely I/O bound even without making use of the original machine's parallelism and most would still be I/O bound even after the speed reduction from this modification. Early in 1952, a high speed shifter was added, which improved the speed for shifting by a factor of five. In July 1953, a 100-word expansion core memory was added to the system, using binary coded decimal, excess-3 number representation. To support this expansion memory, the ENIAC was equipped with a new Function Table selector, a memory address selector, pulse-shaping circuits, and three new orders were added to the programming mechanism.

Source: Wikipedia > Eniac