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Altivec, Altivec

To date, no IBM core has included an AltiVec logic design licensed from Motorola or vice-versa.

In keeping with the "load/store" model of the PowerPC's RISC design, the vector registers, like the scalar registers, can only be loaded from and stored to memory. However, AltiVec provides a much more complete set of "horizontal" operations that work across all the elements of a vector; the allowable combinations of data type and operations are much more complete. Thirty-two 128-bit vector registers are provided, compared to eight for SSE and SSE2 (extended to 16 in x86-64), and most AltiVec instructions take three register operands compared to only two register/register or register/memory operands on IA-32.

The current POWER series microprocessor, the POWER6, introduced in 2007, implements AltiVec. The implementation is similar to the one in 970 and Cell. The last desktop microprocessor from IBM, the PowerPC 970 (dubbed the "G5" by Apple) also implements AltiVec with hardware similar to that of the PowerPC 7400.

Source: Wikipedia > Altivec



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